Integrated circuits utilize clock signals for a variety of purposes. It is important that the clock signal be within a specified frequency range during operation of the circuit. Typically the clock signal will operate within a specified reference frequency range or within specification if the clock signal is outside of the range an error signal will be generated. It is desirable that a system be in place to monitor the frequency of the clock signal to provide an indication of whether the clock signal is within the specified range. Accordingly, what is needed is a system and method that provides good results in behavior and security performance, good behavior at high frequencies, low and very low frequencies (to avoid for example step by step working), and is insensitive to the input clock duty cycle. In addition, it is desired that the method and system has low power consumption, and provides a simpler and more effective solution for determining whether an input clock signal is within specification. The present invention addresses such a need.